TGGS > ECE > 534
Advanced Computer Architecture
Parallel architecture, cache coherence, memory consistency, transactional memory, non-volatile memory, hardware reliability, hardware security, reconfigurable architecture, Graphics architecture, software-hardware codesigns that enable new models of computation.
Credits : 3 (3-0-6)
Pre-Requisites : No
| Course Learning Outcomes (CLOs) : | |
|---|---|
| CLO 1 | Demonstrate ability to develop specifications, implement and design processors using rigorous techniques. |
| CLO 2 | Demonstrate ability to use proper abstractions, programming paradigms and advanced architecture design concepts. |
| CLO 3 | Analyze and identify and exploit opportunities to improve performance and parallelism in hardware by selecting appropriate hardware design techniques that deliver high instruction- and memory-level parallelisms. |
| CLO 4 | Analyze sequential and parallel hardware designs and programs using Amdahl’s law and how hardware of the future works. |
| CLO 5 | Understand and explain the advanced concepts and components of ISAs and microarchitectures. |
| CLO 6 | Write a fully-functioning simulation infrastructure and/or evaluation platform to test new hardware designs. |
| CLO1 | CLO2 | CLO3 | CLO4 | CLO5 | CLO6 | |
| ELO 1 | ✓ | ✓ | ||||
| ELO 3 | ✓ | ✓ | ✓ | |||
| ELO 4 | ✓ | ✓ | ✓ | |||
| ELO 5 | ✓ | ✓ | ✓ | |||
| ELO 8 | ✓ | ✓ |
Revision : July 2021 (090245339)
Other Revisions : July 2020